Filtering by: Creator Ritter, Curtis Jacob Remove constraint Creator: Ritter, Curtis Jacob Department Electrical and Electronic Engineering Remove constraint Department: Electrical and Electronic Engineering
ProjectDesign and simulation of a current-mode logic frequency divider and buffer chain for a phase-locked loop in 0.18µm CMOSRitter, Curtis JacobA current-mode logic (CML) frequency divider and buffer chain were designed and simulated for a phase-locked loop (PLL) in 0.18μm CMOS. In the CML buffer chain, a P-to-N channel converter was designed to convert a signal from a CML buffer using PMOS i . . .