Filtering by: Subject Scaling of CML buffers Remove constraint Subject: Scaling of CML buffers
ProjectDesign and simulation of a current-mode logic frequency divider and buffer chain for a phase-locked loop in 0.18µm CMOSRitter, Curtis JacobA current-mode logic (CML) frequency divider and buffer chain were designed and simulated for a phase-locked loop (PLL) in 0.18μm CMOS. In the CML buffer chain, a P-to-N channel converter was designed to convert a signal from a CML buffer using PMOS i . . .