Thesis

FPGA Pulse Monitor in a Laboratory Test Environment

Manufacturers often resort to Application-Specific Integrated Circuits (ASIC) to meet their specific end-product requirements. Although ASICs are very effective in many applications, they have significant limitations. In particular, designers are often faced with a performance slash cost trade- off. To get the performance they desire, designers often come up with costly ASIC designs. This clash between cost and performance has encouraged the evolution of new technology, pushing toward a more flexible, cost-effective, solution. This thesis will demonstrate how the integration of specialized hardware, Field-Programmable Gate Arrays (FPGA), programmed as a pulse monitor for capturing digital signals, and a graphical user interface (GUI) can provide low a cost solution with greater flexibility, increased data collection/storage, improved portability, higher efficiency, and enhanced performance.

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