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Fabrication and characterization of a 4H-silicon carbide metal-semiconductor field effect transistor
The fabrication of the 4H-silicon carbide metal semiconductor field effect transistor (MESFET) is occurring in the Microelectronics Engineering Laboratory (MEL). There are various experiments occurring that characterize different aspects of the device, in order to achieve its optimum performance. The silicon dioxide (SiO2) layer achieves widespread use in the microelectronics industry. This may be used for the dielectric field effect in MOS (metal oxide semiconductor) devices, as a field oxide for isolation between source, gate, and drain contacts, or for device isolation on a very crowded integrated circuit (IC). In this project, the SiO2 is used for isolation between source, gate, drain, and devices. It is imperative to minimize the defect density in the SiO2 layer to increase the reliability and performance of these devices. The quality of the SiO2 is thus characterized by the fabrication of SiC MOS capacitors. Thermal oxidation has been utilized in the fabrication of the SiO2 in the 4H-SiC MOS capacitors adopting the nickel-SiO2-4H-SiC (Ni/SiO2/4H-SiC) structure. The SiO2 layers have been grown onto Si-face and C-face 4H-SiC substrates employing the techniques of sputtering and wet thermal oxidation. The recipes for deposition by these techniques are optimized by trial and error method. Atomic force microscopy (AFM) analysis is employed in the investigation of growth effects of SiO2 on the Si- and C-face of these SiC substrates. MOS capacitors are made utilizing sputtering and wet oxidation methods on the Si-face of 4H-SiC wafers, which are studied utilizing C-V (capacitance versus voltage) techniques.