Thesis

Tomasulo based MIPS simulator

From 1985 processor designers are using pipeline to cover the instructions execution on each other and increase their design speed. They call this overlap between instructions, "instruction level parallelism" because instructions are calculated in parallel. For developing ILP, there are two main separate methods: First method use hardware to detects and takes advantage dynamically the parallelism and the second method uses software to statically find parallelism at compile time. The processors which used the dynamic hardware based method like the Intel Pentium family are more successful in the market. Robert Tomasulo developed the Tomasulo algorithm for IBM 360/91 floating point. It is a hardware based algorithm which handles out of order execution problems. This project describes the design and implementation of a simulator for a Tomasulo based MIPS architecture processor and its fundamental ideology and needed techniques. The principles of dynamic scheduling and Tomasulo's algorithm are explained. The main features of the simulator are defined and important hazards, which we have to deal with them along with the implementation, and their solutions are mentioned. The implemented simulator is described with its core components and most important functions. The simulator developed using C++ and on a Qt framework.

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